Various types of electronic memory have been developed in recent years. Some exemplary memory types are electrically erasable programmable read only memory (EEPROM) and electrically programmable read only memory (EPROM). EEPROM is easily erasable but lacks density in storage capacity, where as EPROM is inexpensive and denser but is not easily erased. “Flash” EEPROM, or Flash memory, combines the advantages of these two memory types. This type of memory is used in many electronic products, from large electronics like cars, industrial control systems, and etc. to small portable electronics such as laptop computers, portable music players, cell phones, and etc.
Flash memory is generally constructed of many memory cells where a single bit is held within each memory cell. Yet a more recent technology known as MirrorBit™ Flash memory doubles the density of conventional Flash memory by storing two physically distinct bits on opposite sides of a memory cell. The reading or writing of a bit occurs independently of the bit on the opposite side of the cell. A memory cell is constructed of bit lines formed in a semiconductor substrate. An oxide-nitride-oxide (ONO) dielectric layer formed over top of the substrate and bit lines. The nitride serves as the charge storage layer between two insulating layers. Word lines are then formed over top of the ONO layer perpendicular to the bit lines. Applying a voltage to the word line, acting as a control gate, along with an applied voltage to the bit line allows for the reading or writing of data from or to that location in the memory cell array. MirrorBit™ Flash memory may be applied to different types of flash memory, including NOR flash and NAND flash.
Some flash memory cells uses shallow trench isolation (STI) to prevent electrical current leakage between adjacent memory cells in the flash memory. One type of STI that may be used in flash memory is self-aligned STI. However, there is a limitation in the state of the art as to how narrow flash memory device with an STI structure can be and still program properly. For example, a NAND flash memory with self-aligned STI with an ONO layer having a channel width (W) less than about 50 nm does not program properly due to edge fringing field effects, and so such devices do not appear to be functional in the current state of the art. There do not appear to be any solutions to this problem in the prior art.